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Keynote & invited speakers

Dmitry Petunin

Dmitry Petunin|Дмитрий Петунин

Leading Technical Consultant, Intel Software Development tools, Intel Russia

Past 15 years Dmitry worked in compilers development and enabling for Intel and Sun Microsystems. Currently Dmitry is evangelizing Intel Software Development tools

Dmitry holds master degree of Math and Computer science from Novosibirsk State University. Dmitry also coaches people on managing SW development and presentation skills.

Co-presenter: Serge Preis

Serge Preis

Principal Engineer, Intel Russia

Serge Preis is a Principal Engineer in Software and Services group in Intel Russia. He leads vectorizer development in Intel Compiler (Intel Parallel Composer XE) enabling utilization of SSE/AVX/AVX512 instructions of modern Intel CPUs via vectorization optimization and support of explicit SIMD programming models like Cilk™ Plus and OpenMP 4.0 SIMD. He has broad expertise in compiler technologies, modern HW architectures and data-parallel programming. Serge have driven enabling of Intel MICni and AVX512-targeted vectorization before HW release and contributed significantly to explicit SIMD programming model definitions and reference implementations in Intel Compiler.

Serge holds MSc degree in Computer Science and Applied Math from Novosibirsk State University. In his free time Serge enjoys snowboarding and photography.

Vectorize or die! Advanced vectorization techniques

 

A year ago Intel announced AVX-512 instruction set that expands a vector register to 512 bits. In several months first processors which support these instructions will be available for customers. It clearly highlights the importance of program vectorization for effective compute power utilization. The Amdal law states that program scalability is limited by the size of its sequential part. Thus, effective utilization of new vector registers requires bigger program portion to be vectorized comparing to 256-bit registers. Intel® Parallel Studio XE 2016 toolset expands vectorization capabilities by implementing OpenMP 4.0 and potion of OpenMP 4.1 standards for vectorization. The talk will be devoted to overcoming obstacles while vectorizing complex workflows. Sometimes vectorization is considered as a matrix/vector processing technic only. Nevertheless it makes vectorization applicable to many compute intensive, financial, image processing, ray tracing and other workloads. In addition to this we would like to talk about vectorization of complex control flow to expand vectorization to a wider class of applications.

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In cooperation

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With support of

RAEC

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Software Russiai-Help
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